Over the last few decades, the development of ICs has seen the emergence of very large scale integration (VLSI) circuits in which billions of transistors are integrated on modest silicon real estate, e.g. a few millimeter squared. This mainly has been driven by the downscaling of the feature size of the semiconductor elements, e.g. transistors, used to design and manufacture such ICs.
At present, it is entirely feasible to manufacture ICs using sub-micron sized components. Indeed, ICs are being produced in technologies such as CMOS with a typical feature size of less than 100 nm, e.g. 65 or 90 nm. According to Moore's law, these feature sizes will continue to shrink in years to come.
Nevertheless, the reduction of such feature sizes is causing problems that are directly related to this reduction. The consequential increase in component density means that controlling power dissipation per unit area, e.g. heat generation, is now becoming one of the main challenges in facilitating further size reductions.
Traditionally, one of the principal design paradigms at least for ICs intended to process large volumes of digital data has been the optimization of throughput, typically through introduction of parallelism such as instruction level parallelism in which a single instruction stream is scheduled and split over multiple and independent computational units. Examples of such ICs include the Pentium® processor manufactured by the Intel Corporation and the Power PC® processor manufactured by the AIM alliance. However, in moving forward, it is unlikely that such design paradigms can be applied to further miniaturized ICs given the heat generation by such levels of parallelisms.
An approach to control the power dissipation of an IC that has gained popularity over the last decade or so is dynamic voltage and frequency scheduling (DVFS). In this approach, the operating frequency of (parts of) an IC may be reduced, e.g. by lowering the operating voltage, to reduce the power consumption of the IC. This approach unsurprisingly has proven particularly popular in application domains where power supply is limited, e.g. battery-powered electronic devices. An example of such a DVFS approach is disclosed in US2009/049314. However, DVFS is considered less suitable for application domains in which throughput performance is important due to its negative impact thereon.